Date of Award

Fall 12-2021

Level of Access Assigned by Author

Open-Access Thesis

Degree Name

Master of Electrical Engineering (MEE)


Electrical and Computer Engineering


Bruce E Segee

Second Committee Member

Vincent Weaver

Third Committee Member

Mauricio Pereira da Cunha


The Finite-Difference Time-Domain (FDTD) technique is a numerical analysis modeling method to find the solutions of the partial derivatives in Maxwell’s equations to electromagnetic problems. In FDTD the electrical and magnetic fields components staggered in time and space by a method developed by Yee. The approximation of the solutions can be found using a set of updated equations.

In every simulation that utilizes the FDTD method, the factors of time and memory size are the two significant considerations. This study focused on reducing the computation time, as the time required to time-march the components of the electrical and magnetic fields at each of the FDTD problem cells is computationally expensive.

Based on the findings of this study, the issue of time can be solved by parallelizing the code. Since the structures of the FDTD field's components are independent, the algorithm of the FDTD can be divided into small tasks that can be executed concurrently. Two approaches were taken to parallelize the one- and two-dimensional FDTD code: The Compute Unified Device Architecture (CUDA) approach and Open Computing Language (OpenCL) approach.

The serial FDTD C code was implemented and accelerated using CUDA. The result of the comparison between the serial and parallel algorithms (C, CUDA, MATLAB) showed a speed-up of 505 speed factor with the GPU-GPU method and 5 speedup factor with the CPU-GPU method. This was the case for a one-dimensional space problem.

The FDTD code was implemented and executed with the OpenCL (Open Computing Language) software as well. The OpenCL software is important since it is open-source and freely available. In contrast to CUDA, which only supports NVIDIA and enabled GPUs, the code written in OpenCL isportable and can be executed on any parallel processing platforms such as CPUs, GPUs, DSPs, FPGAs, and others. Total time's Speedup of 22X has been recorded with OpenCL (PCL) with respect to CPU-C, with 10000 iterations and a 150000 cells grid size.

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