Date of Award
Level of Access
Master of Science in Electrical Engineering (MSEE)
David E. Kotecki
Second Committee Member
Donald M. Hummels
Third Committee Member
Increasing circuit densities drive the search for microelectronic capacitors with smaller areas. One solution which reduces capacitor size while leaving capacitance constant is to use a thin film of a high permittivity material such as Ta205, SrTiOy (STO), or (Ba,Sr)Ti03 (BST), whose dielectric constants are much higher than those of currently used dielectrics such as Si02 and Si3N1 One drawback of these dielectric films is that they have a polycrystalline microstructure and the permittivity and leakage current density depend on grain size and orientation. It is unknown how microstructure variations will affect the variability and yield of devices incorporating these films. We have developed a Monte Carlo computer simulation to investigate the variability in capacitance and leakage of microelectronic capacitors incorporating polycrystalline dielectrics. Statistical distributions of crystal area, capacitance, and leakage were evaluated. A capacitance model was developed based on permittivity variation versus crystal grain size, and a leakage model was developed based on the Schottky model of electron injection, taking into account barrier height variation versus crystal grain size and barrier height lowering as a function of permittivity. For one simulation, the capacitor area was varied between 0.001 pm2 and 0.3 pm2, and two million capacitors were generated. For the second series of simulations lognormal crystal grain area probability distributions were used to simulate the same range of capacitor areas. The results were then analyzed for trends in how the capacitance and leakage of polycrystalline capacitors will vary based on the innate variations of the dielectrics, independently of any process variations. It was found that variability decreased as the average crystal size became small relative to total capacitor size. Capacitance variations ranged from 3% to 129% and leakage variations ranged fiom 0.09% to 386% depending upon the size of the capacitor and the crystal area probability distribution used. For capacitors with amorphous dielectrics, these variations would not exist.
Cousins, jesse, "Simulation of the Variability in Microelectronic Capacitors having Polycrystalline Dielectrics with Columnar Microstructure" (2003). Electronic Theses and Dissertations. 258.